# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX900 #===------------------------------------------------------------------------===# # Image atomics #===------------------------------------------------------------------------===# # GFX900: image_atomic_add v[5:6], v1, s[8:15] dmask:0x1 tfe 0x00,0x01,0x49,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_add v[5:7], v1, s[8:15] dmask:0x3 tfe 0x00,0x03,0x49,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_and v[5:6], v1, s[8:15] dmask:0x1 tfe 0x00,0x01,0x61,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_and v[5:7], v1, s[8:15] dmask:0x3 tfe 0x00,0x03,0x61,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_cmpswap v[5:7], v1, s[8:15] dmask:0x3 tfe 0x00,0x03,0x45,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_cmpswap v[5:9], v1, s[8:15] dmask:0xf tfe 0x00,0x0f,0x45,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_dec v[5:6], v1, s[8:15] dmask:0x1 tfe 0x00,0x01,0x71,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_dec v[5:7], v1, s[8:15] dmask:0x3 tfe 0x00,0x03,0x71,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_inc v[5:6], v1, s[8:15] dmask:0x1 tfe 0x00,0x01,0x6d,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_inc v[5:7], v1, s[8:15] dmask:0x3 tfe 0x00,0x03,0x6d,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_or v[5:6], v1, s[8:15] dmask:0x1 tfe 0x00,0x01,0x65,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_or v[5:7], v1, s[8:15] dmask:0x3 tfe 0x00,0x03,0x65,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_smax v[5:6], v1, s[8:15] dmask:0x1 tfe 0x00,0x01,0x59,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_smax v[5:7], v1, s[8:15] dmask:0x3 tfe 0x00,0x03,0x59,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_smin v[5:6], v1, s[8:15] dmask:0x1 tfe 0x00,0x01,0x51,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_smin v[5:7], v1, s[8:15] dmask:0x3 tfe 0x00,0x03,0x51,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_sub v[5:6], v1, s[8:15] dmask:0x1 tfe 0x00,0x01,0x4d,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_sub v[5:7], v1, s[8:15] dmask:0x3 tfe 0x00,0x03,0x4d,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_swap v[5:6], v1, s[8:15] dmask:0x1 tfe 0x00,0x01,0x41,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_swap v[5:7], v1, s[8:15] dmask:0x3 tfe 0x00,0x03,0x41,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_umax v[5:6], v1, s[8:15] dmask:0x1 tfe 0x00,0x01,0x5d,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_umax v[5:7], v1, s[8:15] dmask:0x3 tfe 0x00,0x03,0x5d,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_umin v[5:6], v1, s[8:15] dmask:0x1 tfe 0x00,0x01,0x55,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_umin v[5:7], v1, s[8:15] dmask:0x3 tfe 0x00,0x03,0x55,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_xor v[5:6], v1, s[8:15] dmask:0x1 tfe 0x00,0x01,0x69,0xf0,0x01,0x05,0x02,0x00 # GFX900: image_atomic_xor v[5:7], v1, s[8:15] dmask:0x3 tfe 0x00,0x03,0x69,0xf0,0x01,0x05,0x02,0x00